1. Field of the Invention
This invention generally relates to transistor circuitry and, more particularly, to an improved bandwidth amplifier that accepts a single-ended input signal and provides a differential output signal.
2. Description of the Related Art
FIG. 1 is a schematic of a simple circuit employing a speed-up capacitor (prior art). As shown, the speed-up capacitor provides a high frequency low impedance path, in parallel to the resistor. Such a circuit is used to increase the circuit bandwidth or to improve high frequency transient response. The use of speed-up capacitors with single-ended amplifiers is also well known. A single-ended amplifier accepts a single-ended signal input and supplies a single-ended signal output. A single-ended signal is a signal measured with respect to a voltage potential, such as ground.
Likewise, it is known to use speed-up capacitors in differential amplifiers that accept a differential input signal and supply a differential output signal. A differential signal includes a first signal and a second signal approximately 180 degrees out of phase from the first signal. Differential amplifiers are a common component of emitter-coupled logic (ECL) circuits. Any speed-up capacitor added to enhance the response of the first signal must be matched with a speed-up capacitor to enhance the response of the second signal.
However, the addition of speed-up capacitors to circuitry is not always trivial, as dc biasing and other ac signal amplification characteristics can be a concern. One particular problem has been in the use of differential amplifiers that accept a single-ended input signal, but supply a differential output signal. Since such a differential amplifier is not completely symmetrical in design, it is difficult to add a speed-up capacitor that evenly affects both the signal outputs.
It would be advantageous if speed-up capacitors could be used in a differential amplifier that accepts a single-ended input and supplies a differential signal output.
The present invention provides a single-ended to differential output amplifier that provides an improved bandwidth using capacitors in a manner similar to the above-mentioned speed-up capacitors.
Accordingly, an enhanced performance differential output amplifier is provided comprising a first transistor to accept a single-ended input signal and supply a first output signal, and a second transistor to supply a second output signal, approximately 180 degrees out of phase from the first output signal. A first capacitor is connected between the base of the first transistor and the emitter of the second transistor. A second capacitor is connected between the emitter of the first transistor and first voltage. At least one emitter resistor, but typically two, is connected between the emitters of the first and second transistors, and a current source.
The collectors of the first and second transistors are operatively connected to the first voltage, typically through resistors. The current source is connected between the emitter resistors and a second voltage (Vee) having a lower potential than the first voltage.
Typically, bias circuits are connected to the differential amplifier. A first bias circuit includes a (fifth) transistor having a base to accept an input signal and a collector connected to a third voltage (Vcc), having a higher potential than the first voltage. An impedance matching resistor is connected between the base and the first voltage. An emitter-follower joins the fifth transistor emitter to the first transistor base. A second, equivalent bias circuit biases the second transistor.
Additional details of the above-described differential amplifier, and a method for differentially amplifying a single-ended input signal are provided below.